Hyper Analytix provides verification consulting services in the areas of traditional constrained-random simulation-based verification as well as formal verification (i.e. property checking - not to be confused with equivalence checking).
We have worked on numerous design and verification projects including:
- Custom network processor for TCP/IP offload
- High-end (64 socket) server chipset supporting full cache-coherency and RASM features.
- Low-end (2 socket) server core logic devices supporting Intel FSB, PCI, USB, etc
- Large multi-FPGA project in High Performance Computing space
- High-end server CPUs including Itanium2 and several generations of PA-RISC
- Wireless application processors
We have expertise in Verilog, System-Verilog, C/C++ based verification environments and most recently employed the VMM methodology. We are well versed in both SVA and PSL property specification languages. Finally, we have significant practical experience applying formal verification to real projects in a way that achieves high ROI.
Given that our primary focus is on property-driven verification, we prefer consulting engagements that have an emphasis in that area. We are also interested in engagements where the customer is interested in adding some aspect of assertion-based or property-based verification to their environment.
If you need help at crunch-time or you need help adding assertion-based verification to your flow, let us know. If formal verification is of interest to you, but you are unsure about how it should be applied in your project or which vendors tools are the best for your situation, we can help.