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Cadence

Posted on  by  from the site harry ... the ASIC guy
Last year’s Design Automation Conference was kind of quiet and dull, muted by the impact of the global recession with low attendance and just not a lot of real interesting new developments. This year looks very different; I’m actually having to make some tough choices of what sessions to attend. And with all the recent acquisitions by Cadence and Synopsys, the landscape is changing all around, which will make for some interesting discussion. I’ll be at the conference Monday through Wednesday.
harry
Posted on  by  from the site harry ... the ASIC guy
A hiker comes to a fork in the road and doesn’t know which way to go to reach his destination. Two men are at the fork, one of whom always tells the truth while the other always lies. The hiker doesn’t know which is which. He may ask one of the men only one question to find his way. Which man does he ask, and what is the question? __________ There’s been lots of discussion over the last month or 2 about the direction of EDA going forward. And I mean literally, the “direction” of EDA.
harry
Posted on  by  from the site harry ... the ASIC guy
http://www.flickr.com/photos/optical_illusion/ / CC BY 2.0 What’s a blog without some sort of obligatory year end TOP 10 list? So, without further ado, here is my list of the TOP 10 events, happenings, occurrences, observations that I will remember from 2009. This is my list, from my perspective, of what I will remember.
harry
Posted on  by  from the site harry ... the ASIC guy
I was contacted a few weeks ago by Synopsys’ PR agency to see if I’d be interested in covering an upcoming product announcement. I usually ignore these “opportunities” since the information provided is usually carefully wordsmithed marketing gobbledygook and not enough for me to really form an opinion. However, it turned out that this announcement was on a subject I know a little bit about, so I took them up on their offer. The announcement was “embargoed“, that is, I was not to make it public until today.
harry
Posted on  by  from the site harry ... the ASIC guy
It was easy to spot the big theme’s at DAC this year. This was the “Year of ESL” (again). The state of the economy and the future of EDA was a constant backdrop. Analog design was finally more than just Cadence Virtuoso. And social media challenged traditional media. It was harder to spot the themes that were not front and center, that were not spotlighted by the industry beacons, that were not reported by press or bloggers. Still, there were important developments if you  looked in the right places and noticed what was changing.
harry
Posted on  by  from the site harry ... the ASIC guy
Sean Murphy has the best one sentence description of DAC that I have ever read: The emotional ambience at DAC is what you get when you pour the excitement of a high school science fair, the sense of the recurring wheel of life from the movie Groundhog Day, and the auld lang syne of a high school re-union, and hit frappe. That perfectly describes my visit with Oasys Design Systems at DAC. Auld Lang Syne When I joined Synopsys in June of 1992, the company had already gone public, but still felt like a startup.
harry
Posted on  by  from the site harry ... the ASIC guy
(Photo courtesy J.L. Gray)  Last year, at the Design Automation Conference, there were only a couple dozen individuals who would have merited the title of EDA blogger. Of those, perhaps a dozen or so wrote regularly and had any appreciable audience. In order to nurture this fledgling group, JL Gray (with the help of John Ford, Sean Murphy, and yours truly) scrounged a free room after-hours in the back corner of the Anaheim Convention Center in which to hold the first ever EDA Bloggers Birds-of-a-Feather session.
harry
Posted on  by  from the site harry ... the ASIC guy
That’s the question that everyone was asking last week when Oasys Design Systems came out of stealth mode with a “chip synthesis” tool they claim leaves Synopsys’ Design Compiler and other synthesis tools in the dust. According to Sanjiv Kaul, Chairman of Oasys and former VP of Synopsys’ Implementation Business Unit, RealTime Designer can synthesize full chips up to 100 million gates in a single run, and do so 20x faster with smaller memory requirements and achieving better quality of results.
harry
Posted on  by  from the site harry ... the ASIC guy
By Narendra (Nari) Shenoy, Technical Program Co-Chair, 46th DAC Each year, around this time, the electronic design industry and academia meticulously prepare to showcase the latest research and technologies at the Design Automation Conference. For the casual attendee, after a few years the difference between the conferences of years past begins to dim. If you are one of them, allow me to dispel this notion and invite you to look at what is different this year. For starters, we will be in the beautiful city of San Francisco from July 26-31.
harry
Posted on  by  from the site harry ... the ASIC guy
My morning routine is pretty, well, routine. Get up.  Wake the kids. Check email.  Ask the kids to stop jumping on the couch. Check Twitter. Tell the kids again to stop jumping on the couch. Check my Google Reader.
harry
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